EXTREME Copper Printed Circuit Boards
The special requirements for the design of heavy copper printed circuit boards, EXTREME copper printed circuit boards and PowerLink technology and other forms of component mounting and interconnecting structures incorporating copper weights ≥ 3oz/ft2. Some sections of this standard are guidelines ONLY, and are noted as such.
The requirements contained in this standard are intended to establish design recommendations that are to be used in conjunction with the design principles laid out in IPC-2221, IPC-2222.
This standard's intended use is by printed circuit board designers who incorporate copper weights ≥ 3oz/ft2 into their products.
General Design Considerations
The general parameters to be considered before and during the design of any printed circuit board, but focuses on boards incorporating copper weights ≥ 3oz/ft2. The following parameters can and will have a major impact on reliability and performance of the end product. Epec believes the parameters listed in this section are a MINIMUM to be considered. A comprehensive listing of all parameters and their design/performance tradeoffs is shown in IPC-2221.
The end product requirements must be known before design start-up. Servicing and maintenance of the end product can directly influence conductor routing, part placement, board size, markings, coatings and final finish.
Finished printed circuit boards manufactured by Epec meet or exceed the performance requirements of IPC-6011. There are three general end product performance classes that IPC-6011 has established. Class 1 is "general electronic products", Class 2 is "dedicated service electronic products" and Class 3 is "high reliability electronic products". Please see IPC-6011 or IPC-2221 for more information on the 3 classes. Epec requires all products to be class specified and any exceptions or additions to the specifications to be clearly indicated on the master drawings.
Material Type & Properties
There are several material choices available to the designer, ranging from standard printed circuit board epoxy resins to advanced dielectrics with specialized properties. There are a number of properties the designer must consider, including but not limited to; temperature (soldering and operating), electrical properties, structural strength, flame resistance, machine ability, CTE, thermal conductivity and thermal stability. Laminate materials should be selected from materials listed in IPC-4101.
It is important to note that for high current designs the temperature rise due to current flow in the conductor, when added to all other sources of heat at the conductor/laminate interface, do not exceed the maximum operating temperature specified for the laminate or the assembly. See IPC-2222 for maximum operating temperature for laminate materials. Materials used (prepreg, copper-clad, copper foil, heatsink, etc.) and minimum dielectric thickness/spacing must be specified on the master drawing.
Markings, Coatings & Final Finish
Solder mask is used to provide a hard, durable solder resistant coating that also has electrical insulation properties. Epec applies solder mask coatings in accordance with IPC-SM-840. Solder mask can be used to protect (tent) vias from process solutions and soldering. The maximum finished hole diameter that can effectively be tented is 0.025". Larger hole diameter tenting must be agreed to between the end user and Epec. The electrical insulation properties of solder mask depend on the thickness applied and the type of mask used.
Epec has developed a "capping" process that provides greater electrical insulation properties than regular solder mask. This process involves bonding a thin layer of epoxy resin to specified areas of the completed printed circuit board. Designers must specify how much insulation is required and where the "cap" is to be placed. Please note that surfaces under the "cap" will not be available for soldering.
All markings and/or legends required by the end user must be specified on the master drawings. The type of marking (non-conductive ink, etched characters, or other methods) must be clearly specified. Markings should be placed to avoid being covered by components and should never be on conductive surfaces. Whenever practical, part number, revision, layer number and orientation markings should be incorporated on the master artwork. Most non-conductive inks are liquid screened and markings within 0.020" MAY be slipped 0.005" or more from solderable surface. Please note that liquid screened marking's legibility is affected by high surface irregularities.
Test specimens (coupons) are used as representatives of the printed circuit boards fabricated on the same panel. Coupons are used for most destructive quality evaluations and evaluations that require a specific design that doesn't exist on the printed circuit board. Epec uses coupons on each panel processed for process control evaluation purposes. Layer to layer registration, copper thickness on each layer and in plated through holes, plating adhesion, solderability, soldermask thickness and soldermask adhesion are some of the process parameters evaluated. Material quality assurance is based on statistical sampling normally performed by the material manufacturer.
All material that becomes part of the finished product is certified to be in accordance with the master drawing and/or procurement documentation. Conformance evaluations required by the end user must be outlined on the master drawing. The master drawing must include a configuration of the coupon to undergo conformance evaluation. When feasible, coupons are located in the center of each panel to best reflect plating characteristics. All coupons (whether for conformance or process control evaluations) are identified by board part number, revision, lot number, logo, and date code.
HASL (Hot Air Solder Leveling)
Dipped in a bath of molten solder to cover all bare copper. Excess solder is removed with hot air knifes as it is drawn out of the bath.
Electroplated gold (nickel/cobalt hardener) over electroplated nickel. Primarily used for edge board contacts.
ENIG (Electroless Nickel Immersion Gold)
Immersion (chemically applied) pure gold over electroless nickel (also chemically applied. Primarily used for wire bonding or to prevent oxidation of the underlying plating.
Immersion process. Clear, thin organic solderability protective coating (OSP) that protects the underlying plating from oxidation. Useful where flatness is required on surface mount lands. When OPS coatings are used, solderability retention and storage life must be agreed to and documented.
Immersion Tin (chemically applied) (90% to 95%) with the balance being Bismuth over bare copper. Primarily Used for a cost effective RoHS Compliant finish, which is also, REVERSE compatible with lead based systems.
Immersion Pure Silver (chemically applied) over bare copper. Primarily used as an RoHS compliant finish where Tin & ENIG may not be desirable.
Inspection & Traceability
All products manufactured by Epec are subject to in-process inspections and final inspections in accordance with the performance class specified on the master drawings. Quality assurance evaluations on finished product normally consist of the following: material, conformance inspections and process control evaluations. Test specimens (coupons) are used as representatives of the printed circuit boards fabricated on the same panel. Coupons are used for most destructive quality evaluations and evaluations that require a specific design that doesn't exist on the printed circuit board. Epec uses coupons on each panel processed for process control evaluation purposes. Layer to layer registration, copper thickness on each layer and in plated through holes, plating adhesion, solderability, soldermask thickness and soldermask adhesion are some of the process parameters evaluated.
Material quality assurance is based on statistical sampling normally performed by the material manufacturer. All material that becomes part of the finished product is certified to be in accordance with the master drawing and/or procurement documentation. Conformance evaluations required by the end user must be outlined on the master drawing. The master drawing must include a configuration of the coupon to undergo conformance evaluation. When feasible, coupons are located in the center of each panel to best reflect plating characteristics. All coupons (whether for conformance or process control evaluations) are identified by board part number, revision, lot number, logo, and date code.
There are several types of bare board electrical testing. Continuity/discontinuity (testing for opens or shorts), insulation resistance (assures sufficient conductor spacing), dielectric withstanding voltage (assures sufficient dielectric thickness), conductor resistance (assures correct conductor cross-sectional area) and capacitance (assures correct dielectric thickness) are some of the electrical tests available. Epec performs all bare board testing according to IPC-9252. Some electrical testing (such as conductor resistance) is difficult to perform and is normally only performed on certain customer specified conductors that have a tight operational range.
Board Size & Type
There is a limit to the size of board that can be produced. This limitation is mainly due to equipment factors. Epec uses several different panel sizes in order to maximize manufacturability and minimize costs. The panel size used depends on a number of factors including: circuit complexity, pallet size or board size, number of layers, copper weight, and process parameters. The engineering department of Epec chooses the production panel size during contract review.
Designs using copper weights ≥ 3oz/ft2 will be subject to these requirements due to the nature of the production processes involved and the impact these requirements have on the end product's performance and reliability.
Maximum Board Size
The decision for board type (single-sided, double-sided, or multi-layer) should be based on electrical performance, circuit density, and mechanical requirements.
|Board Type||*Maximum Standard Dimensions (inches)|
|Single-Sided / Double-Sided||16.60" X 22.60"|
|Multi-layer||16.30" X 22.30"|
Balanced circuitry distribution on each copper layer and symmetrical construction are important to minimize the degree of bow and twist of a circuit board (See IPC-6011 for values and measurement parameters). The cross-sectional layout, which includes core thickness, dielectric thickness, inner layer planes, and individual copper layer thicknesses, should be kept as symmetrical as possible about the center of the board. When tighter tolerances for bow and twist are required to meet assembly or performance criteria, some sort of support hardware may be necessary.
Documentation & File Formats
Documentation packages should consist of a master drawing and copies of the artwork masters. The package may be provided in either hard copy or electronic data. The layout should always be drawn as viewed from the primary side of the board. All drawings and electronic files should be identified with the board part number and revision status. Notes are especially important for the engineering review; outlining non-standard tolerances, plating requirements, board stack-up, and inspection criteria.
Epec prefers that all master artwork be sent in Gerber RS-274X (with embedded apertures) electronic file format. Alternatively, we also work with ODB++ files. Please contact us with any special electronic file requirements. All other electronic data (drawings, specifications, assembly part lists, etc.) may be sent in a variety of file formats although some (such as DXF and PDF) are preferred.
A cross-sectional build diagram showing dielectric thicknesses and copper thicknesses is called a board stack-up. The board stack-up should be included on the master drawing along with any special build requirements. Note that the board stack-up must include a nominal value with tolerances for each separation and copper thickness. A minimum value may be used alternatively. The total board thickness tolerance is a cumulative total of all internal tolerances. In certain situations where a component or mounting point has a specific thickness requirement different than the rest of the board, please note it in the engineering notes on the master drawing.
Conductor Width, Spacing & Thickness
The minimum width and thickness of a conductor is determined primarily on the basis of the current carrying capacity required and the maximum permissible conductor temperature rise. The conductor's permissible temperature rise is defined as the difference between the maximum safe operating temperature of the laminate material and maximum temperature of the thermal environment to which the board is subjected.
The conductor thickness of copper layers (internal or external) includes a copper foil thickness and a plated copper thickness (in most cases) deposited during the plate through hole process. If conductor thickness is critical, a minimum finished conductor thickness on each layer and in holes must be specified on the master drawing. There is a maximum thickness of 10 oz/ft2 for traditional internal copper layers when using epoxy based laminate material. Thicker internal layers are possible using specialized EXTREME Copper processing. Conductors should be spaced out as much as possible on individual layers provided there is space available. There is a minimum allowable conductor spacing (this includes layer to layer) requirement for all printed wiring boards when a certain voltage is applied. When a minimum conductor spacing requirement arises due to a voltage constraint; it must be defined on the master drawing.
Producing printed circuit boards incorporating copper weights ≥ 3 oz/ft2 require specialized processes that have been developed by Epec. These processes have tolerances and limitations associated with them. Our experience has shown that there are minimum conductor widths and spaces that can be processed for specific copper weights.
Minimum Conductor Spacing VS. Voltage Peak
|Voltage DC or AC peaks||Minimum Spacing (inches)|
B1 - Internal Conductors
B2 - External Conductors, uncoated, sea level to 3050m
B3 - External Conductors, uncoated, over 3050m
B4 - External Conductors, with permanent polymer coating (any elevation)
B5 - External Conductors, with conformal coating over assembly (any elevation)
A6 - External Component lead/termination, uncoated
A7 - External Component lead termination, with conformal coating (any elevation)
* This chart is taken from IPC-2221 and reprinted with permission.
Holes And Interconnections
All lands (conductor pads) and annular rings should be maximized whenever possible provided that good design practice and all electrical spacing requirements are met. Class 3 designs incorporating copper weights ≥ 3 oz/ft2 must strive for the "ideal" pad diameter since this class of product doesn't allow for breakouts. The performance specifications for Class 1 and Class 2 may allow for partial breakouts (see IPC-6011). Circular pads are most common, but it should be noted that other pad shapes could be used to increase spacing and therefore producibility. Fillets, keyholing, and corner entry pad shapes may be used provided breakout is allowed.
The thickness of copper in the barrel of the plated through hole and the thickness of copper on the external surface will not be the same in most cases. The copper plating in the holes will be the same as the additional plating required to bring the base foil to the final copper weight. The minimum copper thickness in the barrel of a plated through hole is 0.0008". Epec allows for a copper thickness of 0.0020" in the barrel as a standard, although any thickness is achievable. Note any minimum PTH copper thickness requirement on the master drawing.
Solder Resist & Other Coatings
Epec has developed application techniques that allow for multiple coats of solder mask without affecting solderability or solder mask adhesion. Please contact our engineering department with any special solder mask requirements.
Epec strongly recommends all designs with copper weights greater than 3 oz/ft2 (on internal or external layers) to employ solder mask on external layers due to the high temperature requirements when soldering. The solder mask acts as a thermal barrier to the laminate material; enabling pads and lands to heat up faster. All solder mask clearance diameters must comply with Appendix A.
Epec has developed a "capping" process that provides greater electrical insulation properties than regular solder mask. This process involves bonding a thin layer of epoxy resin to specified areas of the completed printed circuit board. Designers must specify how much insulation is required and where the "cap" is to be placed. Please note that surfaces under the "cap" will not be available for soldering. Please contact our engineering department about this new and innovative technology.
Notation Ink & Other Markings
Copper weights greater than 3 oz/ft2 on external layers will have an adverse affect on notation ink's legibility. In order for important assembly information and labeling to be legible, we recommend that all markings be on a non-conductor area at least 0.100” from a conductor edge and/or entirely on top of a ground plane area or large conductor. All liquid screened markings must be at least 0.004" in width in order for various letter fonts to be legible.
PowerLink is a technology Epec has developed that allows multiple copper weights to occupy the same layer of circuitry. This technology enables the designer to have logic circuits and power circuits on the same plane. All of the design requirements covered in this standard apply to designs incorporating PowerLink. One special note: Conductor spacing between different copper weights must follow Appendix A for the greater copper weight.
Learn more about PowerLink technology in your PCB Design.
Disadvantages of Using PowerLink/Extreme Copper
The only disadvantage of using Extreme Copper in your design is it can cost significantly more than traditional printed circuit board technology. In many industries like aerospace and defense, the technology has received wide acceptance as the cost is secondary to the performance of the product.
However, it is important to be aware of the potential cost differentials before beginning a project with this technology as the engineering time and cost associated with these finished products is substantially higher than a typical printed circuit board.
While we are 100% confident that we can create a manufacturable design for any application, less than 10% of those designs are pursued do the fact that the end product from the design is much more costly than the customer can afford.
The best way to avoid this challenge is to let us know at the very beginning what the budget is for the product so we can design something with that in mind or quickly determine if the target price is not realistic.